Integrated circuit (semiconductor) devices, e.g., field effect ransistors (FETs), are used in logic, memory, processor, communication devices, e.g., microwave communication, and other integrated circuit devices. The FET includes spaced apart source and drain regions, a channel there between and a gate electrode adjacent the channel. As the integration density of integrated circuit FETs continues to increase, the size of the active region and the channel length decreases.
FinFET technologies have been developed to increase chip density, while allowing a further scaling of the channel length. Although the FinFET technologies can deliver superior levels of scalability, design engineers still face significant challenges in creating designs that optimize the FinFET technologies. For example, as process technologies continue to shrink towards 14-nanometers (nm), it is becoming difficult to achieve a similar scaling of certain device parameters, particularly the power supply voltage, which is the dominant factor in determining dynamic power. For example, design engineers still face significant challenges to design higher voltage FET devices which can handle >2V in fin based technologies for 14 nm and beyond.